Visibl Semiconductors

Visibl Semiconductors on LinkedIn · Jul 2026

Visibl announced a DAC 2026 talk on AI-native workflows from architecture to production readiness and discussed its first tapeout.

Jordon Kashanchi on LinkedIn · Jul 2026

Jordon Kashanchi previewed a DAC talk about the team’s chip tapeout experience and said some AI-assisted steps worked well while others did not.

Y Combinator · Feb 2026

YC launch page describing Visibl as a coordination layer for chip design that monitors specs, implementation, CI, and other design collateral to detect drift early and produce review-ready fixes.

Y Combinator on LinkedIn · Feb 2026

YC’s launch post highlights the product vision, founder background, and the target problem of chip-design coordination bottlenecks before tapeout.

Visibl Semiconductors on LinkedIn · Feb 2026

Company launch post reiterating the product position and founding story, including the team’s experience in production systems and custom AI chips.